The Benefits of a Dual Port in Data Acquisition

By Mark Baumann

Director, Product Definition & Applications

MoSys, Inc.

As part of the data we have been receiving from our customers that work in the data acquisition and Test and Measurement areas, there is a real benefit to the support of a Dual Ported operation to the storage or memory used. The benefits seem obvious in that many systems maintain a flow of data that is to acquire information from a measurement device (like an A-D) and hold that information until a computational resource is available to act upon this information. In these cases, having the ability to access common memory locations from two sources (one the acquisition device and secondly the computation device) is a customary need.

In a case such as this, a Dual port or memory device that allows access to a common block of memory is ideal. The MoSys device(s) with its two GCI ports, allows for this type of operation.

This solution directly benefits system throughput and performance by not having to “move” the acquired data to the computational device. It allows for direct access to common memory by the two entities. This results in a measurable efficiency to the system.  In the following illustration, the upper portion shows how in many systems with single ported memory the access is treated as a look-aside function and the data needs to be passed from one device (or FPGA) to the next. The MoSys devices allow for a different mode of operations. With a MoSys (BE-3) device, it can be positioned in between two devices (FPGAs) and the data is accessible without the need to physically move it to a dedicated block of memory.

An additional and potentially beneficial option offered by MoSys is the use of a PHE (Programmable HyperSpeed Engine), as both a dual ported memory as well as an accelerator to the computational engine that would normally be resident in an FPGA. The PHE is a device that can be configured as a dual ported memory, and also has an available 32 RISC cores on die which in turn, enables the user the capability of performing operations. These include simple operations as memory reads and write ups to some complex ALU operations (Boolean as well as Arithmetic) and bit manipulations such as Extracts and chomps — all within the same footprint as the standard BE-3 memory device.

The options that MoSys offers in support of high-speed Data Acquisition and Test and Measurement span a straight BE-2 device that is 576Mb in density and offers two GCI Interface ports through to the BE-3 that doubles the density of the BE-2 up to 1.1Gb of memory. There is also a PHE which is a superset of the BE-3 , it maintains the Dual Ported feature and in addition, it also offers the ability to offload some computational functions onto the 32 on die RISC cores.

If any of these devices are of interest, please contact MoSys Sales or Applications at: MoSys.

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